Physical & Logical Attributes
| Fundamental Memory Class: | DDR4 SDRAM |
| Module Speed Grade: | DDR4-2133 |
| Base Module Type: | UDIMM (133.35 mm) |
| Module Capacity: | 8192 MB |
| Reference Raw Card: | B0 (8 layers) |
| Initial Raw Card Designer: | Micron Technology |
| Module Nominal Height: | 31 < H <= 32 mm |
| Module Thickness Maximum, Front: | 1 < T <= 2 mm |
| Module Thickness Maximum, Back: | T <= 1 mm |
| Number of DIMM Ranks: | 2 |
| Address Mapping from Edge Connector to DRAM: | Mirrored |
| DRAM Device Package: | Standard Monolithic |
| DRAM Device Package Type: | 78-ball FBGA |
| DRAM Device Die Count: | Single die |
| Signal Loading: | Not specified |
| Number of Column Addresses: | 10 bits |
| Number of Row Addresses: | 15 bits |
| Number of Bank Addresses: | 2 bits (4 banks) |
| Bank Group Addressing: | 2 bits (4 groups) |
| DRAM Device Width: | 8 bits |
| Programmed DRAM Density: | 4 Gb |
| Calculated DRAM Density: | 4 Gb |
| Number of DRAM components: | 16 |
| DRAM Page Size: | 1 KB |
| Primary Memory Bus Width: | 64 bits |
| Memory Bus Width Extension: | 0 bits |
| DRAM Post Package Repair: | Not supported |
| Soft Post Package Repair: | Not supported |
DRAM Timing Parameters
| Fine Timebase: | 0.001 ns |
| Medium Timebase: | 0.125 ns |
| CAS Latencies Supported: | 9T, 11T, 12T, 13T, 14T, 15T, 16T |
| DRAM Minimum Cycle Time: | 0.937 ns |
| DRAM Maximum Cycle Time: | 1.500 ns |
| Nominal DRAM Clock Frequency: | 1067.24 MHz |
| Minimum DRAM Clock Frequency: | 666.67 MHz |
| CAS# Latency Time (tAA min): | 13.500 ns |
| RAS# to CAS# Delay Time (tRCD min): | 13.500 ns |
| Row Precharge Delay Time (tRP min): | 13.500 ns |
| Active to Precharge Delay Time (tRAS min): | 33.000 ns |
| Act to Act/Refresh Delay Time (tRC min): | 46.450 ns |
| Normal Refresh Recovery Delay Time (tRFC1 min): | 260.000 ns |
| 2x mode Refresh Recovery Delay Time (tRFC2 min): | 160.000 ns |
| 4x mode Refresh Recovery Delay Time (tRFC4 min): | 110.000 ns |
| Short Row Active to Row Active Delay (tRRD_S min): | 3.674 ns |
| Long Row Active to Row Active Delay (tRRD_L min): | 5.355 ns |
| Long CAS to CAS Delay Time (tCCD_L min): | 5.375 ns |
| Four Active Windows Delay (tFAW min): | 21.000 ns |
| Maximum Active Window (tMAW): | 8192*tREFI |
| Maximum Activate Count (MAC): | Untested MAC |
| DRAM VDD 1.20 V operable/endurant: | Yes/Yes |
Intel Extreme Memory Profiles
| Profiles Revision: 2.0 |
| Profile 1 (Certified) Enables: Yes |
| Profile 2 (Extreme) Enables: No |
| Profile 1 Channel Config: 1 DIMM/channel |
| XMP Parameter | Profile 1 | Profile 2 |
| Speed Grade: | DDR4-2998 | N/A |
| DRAM Clock Frequency: | 1499 MHz | N/A |
| Module VDD Voltage Level: | 1.35 V | N/A |
| Minimum DRAM Cycle Time (tCK): | 0.667 ns | N/A |
| CAS Latencies Supported: | 16T,15T | N/A |
| CAS Latency Time (tAA): | 10.625 ns | N/A |
| RAS# to CAS# Delay Time (tRCD): | 12.000 ns | N/A |
| Row Precharge Delay Time (tRP): | 12.000 ns | N/A |
| Active to Precharge Delay Time (tRAS): | 25.250 ns | N/A |
| Active to Active/Refresh Delay Time (tRC): | 37.250 ns | N/A |
| Four Activate Window Delay Time (tFAW): | 23.000 ns | N/A |
| Short Activate to Activate Delay Time (tRRD_S): | 3.701 ns | N/A |
| Long Activate to Activate Delay Time (tRRD_L): | 5.300 ns | N/A |
| Normal Refresh Recovery Delay Time (tRFC1): | 350.000 ns | N/A |
| 2x mode Refresh Recovery Delay Time (tRFC2): | 260.000 ns | N/A |
| 4x mode Refresh Recovery Delay Time (tRFC4): | 160.000 ns | N/A |
| Show delays in clock cycles |